Small-signal models
Linearize the full transistor around a verified DC operating point and turn local derivatives into circuit elements. Build the BJT hybrid-π model from gm and β, derive rπ=β/gm, add output resistance ro when Early effect matters, construct JFET/MOS low-frequency models from gm and go, and show how independent DC supplies become AC ground while controlled sources remain active. Connect these equivalent circuits to the Jacobian of the nonlinear device equations and state when capacitances, body effect and frequency dependence must be added.
- Separate the DC bias problem from the incremental small-signal problem using total variable = Q-point + perturbation.
- Derive the BJT hybrid-π input resistance rπ=β/gm from ib=vπ/rπ and ic=gmvπ under the declared incremental current-gain approximation.
- Write the low-frequency BJT collector-current relation ic=gmvπ+vce/ro and identify ro as an output-slope model rather than a DC resistor physically inside the transistor.
- Relate the BJT T-model emitter resistance to gm and explain the β-dependent distinction between re≈1/gm and the exact low-frequency relation under the chosen model.
- Construct the low-frequency JFET/MOS model with open ideal gate current, controlled source gmvgs and finite ro=1/go when output dependence is retained.
- Explain how linearization of nonlinear terminal equations produces the same conductance coefficients that appear in the small-signal equivalent circuit.
- Zero independent DC voltage/current sources correctly when forming an incremental circuit while leaving dependent sources active.
- Decide whether coupling/bypass capacitors are open, short or finite impedances from frequency rather than by a universal rule.
- Identify the principal capacitances omitted from a low-frequency BJT/JFET/MOS model and explain qualitatively how they make input/output behavior frequency dependent.
- Validate a small-signal model by checking bias-region validity, perturbation amplitude, dimensions, KCL and consistency between model coefficients and the Q-point.
A small-signal model is not a second transistor law. It is the first-order Taylor model of the nonlinear device around a previously verified DC operating point.
04.1Total variable = bias + increment
Uppercase quantities denote the DC operating point; lowercase quantities denote small increments. The DC network determines Q. The small-signal network predicts only the incremental response around Q.
Linearizing a terminal-current vector I(V) gives
where JQ is the Jacobian of local conductances. The small-signal circuit is a circuit representation of this Jacobian.
04.2BJT hybrid-π model from local derivatives
Figure 4.1 — Low-frequency hybrid-π model
The one question is: which small-signal paths connect base, collector and emitter?
rπ connects b to e. Between c and e, the controlled current source gm·vπ is in parallel with ro. All three terminals remain explicit: this is a circuit model, not an abstract transistor box.
Let vπ=vbe. The intrinsic collector-current increment is
If the incremental current gain β is used, ic≈βib, so
Thus rπ is not an independent magic parameter in this first model; it follows from the chosen β and gm at Q.
04.3Finite BJT output resistance represents Early-effect slope
If collector current has local dependence on VCE, retain
A common first approximation is ro≈VA/ICQ when an Early voltage VA model is declared. ro is the tangent output resistance around Q, not a literal fixed resistor existing independently of bias.
At IC=1 mA and VA=100 V, ro≈100 kΩ. If the external collector load is only 1 kΩ, ignoring ro may be acceptable for some calculations; if the external load is hundreds of kilohms, it may not be.
04.4BJT T-model and the emitter resistance
The same low-frequency linearized BJT can be represented from the emitter side. Since ie=ic+ib and ic=gmvbe, ib=ic/β,
Therefore the intrinsic emitter-side resistance in this model is
For large β, re≈1/gm. The approximation is useful, but the exact relation above keeps track of the finite base-current contribution.
04.5JFET/MOS low-frequency model
Figure 4.2 — Low-frequency JFET/MOS small-signal model
The one question is: what remains when ideal gate current is zero?
The gate remains an open terminal in the ideal intrinsic low-frequency model. Between drain and source, gm·vgs and ro are parallel. No artificial wire connects the gate to the channel.
With ideal low-frequency gate current neglected, the gate is an open input branch in the intrinsic model. The channel current increment is
For a first long-channel MOS saturation model with channel-length modulation λ,
a common local approximation is ro≈1/(λIDQ). For a JFET, finite output slope is similarly represented by ro when the chosen device/model requires it.
04.6How to zero independent DC sources
When forming the incremental circuit, the DC operating point is already absorbed into Q. Independent source increments are set to zero unless they themselves carry an AC signal.
This is the same source-zeroing logic used in linear circuit theory, applied to the already-linearized incremental network.
04.7Capacitors are not automatically shorts in “AC analysis”
Coupling and bypass capacitors must be represented by their impedance
Only when |ZC| is negligible compared with the surrounding impedances may a capacitor be approximated as a short. At sufficiently low frequency it may instead behave nearly open.
Therefore a “midband small-signal model” is a frequency-range approximation, not a synonym for every AC condition.
04.8High-frequency device capacitances extend the model
The low-frequency models omit charge storage. Important first extensions include:
- BJT: diffusion/base-emitter capacitance Cπ and collector-base capacitance Cμ.
- JFET: reverse-biased junction capacitances such as Cgs and Cgd.
- MOSFET: gate capacitances Cgs,Cgd and junction/body capacitances such as Cdb/Csb, with bias-dependent partitioning.
Once these elements matter, input and output currents become frequency dependent and feedback through Cgd/Cμ can strongly affect gain and bandwidth.
04.9Worked local parameters at the BJT Q-point
Use chapter-03 gm≈73.5 mS and choose an illustrative incremental β=100. Then
If VA=100 V and IC≈1.90 mA,
These values belong to this Q-point and chosen compact parameters. Moving the bias changes gm and therefore rπ/re; changing the Early model changes ro.
04.10Mastery exercises
- For gm=40 mS and β=120, find rπ.
- For the same BJT, find re from the finite-β relation.
- At IC=2 mA and VA=80 V, estimate ro.
- A MOSFET has gm=3 mS and λ=0.02 V⁻¹ at ID=1 mA. Estimate ro.
- Why does a DC supply become AC ground in the incremental circuit?
- Why must a dependent current source gm vgs remain active?
- At 100 Hz, C=1 μF has what reactance magnitude approximately?
- Name two capacitances that must be added to a high-frequency MOS small-signal model.
Solutions
1. rπ=120/0.04=3 kΩ.
2. re=1/[0.04(1+1/120)]≈24.8 Ω.
3. 80 V/2 mA=40 kΩ.
4. ro≈1/(0.02·0.001)=50 kΩ.
5. Its incremental voltage is zero because its DC value is already part of Q.
6. It represents the transistor’s local control relation and is not an independent bias source.
7. |XC|≈1/(2π·100·1 μF)≈1.59 kΩ.
8. Examples: Cgs and Cgd; junction capacitances Cdb/Csb may also matter.
Chapter 05 will use these models to derive input/output resistance systematically and to define where low-frequency, unilateral, constant-β and long-channel approximations fail.