BJT, JFET & MOSFET device families

AoN uses signed terminal variables. For the n-type examples above, VBE=VB−VE and VCE=VC−VE for the BJT; VGS=VG−VS and VDS=VD−VS for the FETs. Currents are declared before equations rather than inferred afterward.

Terminal-current conservation is exact at the lumped-device boundary:

Relations such as IC≈βIB or IG≈0 are models, not conservation identities.

An NPN BJT contains two p–n junctions arranged so that, in forward-active operation, the base–emitter junction is forward biased while the collector–base junction is reverse biased. Carrier injection from emitter into the thin base supplies carriers that are collected by the collector field.

In an idealized forward-active model, collector current depends exponentially on VBE:

The base current is finite because recombination and carrier supply through the base terminal are not zero. A common compact relation is IC≈βIB, but β depends on device, current, temperature and operating region. Treating β as a universal constant is a modeling error.

An n-channel JFET has a conducting semiconductor channel between source and drain. The gate forms p–n junctions to the channel. In normal control operation those gate junctions are reverse biased, so changing VGS changes depletion width and therefore the effective conducting cross-section of the channel.

The ideal DC gate current is therefore very small rather than being the control current that sustains drain current. A common saturation-region transfer approximation is

for the declared n-channel model and its valid VGS interval. The sign convention for VP varies between texts; AoN will state it explicitly whenever this equation is used. The equation is not a universal FET law and should not be applied outside its model range.

A typical depletion-mode JFET conducts at VGS=0. Making VGS more reverse-biased expands depletion regions and reduces ID toward cutoff.

A MOSFET separates the metal/polysilicon gate from the semiconductor by an insulating dielectric. Ideally, no DC conduction path exists through the gate dielectric. Gate voltage instead changes the electric field and semiconductor surface charge.

For a common n-channel enhancement MOSFET, a sufficiently positive VGS produces an inversion channel connecting source and drain. In the simplest long-channel strong-inversion model, drain current in saturation is often written

before channel-length modulation and other corrections. This equation already carries strong assumptions: long channel, strong inversion, a particular operating region and approximately constant mobility. Modern short-channel devices can depart substantially from this square-law model.

For a reverse-biased JFET gate or insulated MOS gate, DC gate current can be very small. But gate structures store charge and have capacitance. Therefore a changing gate voltage requires current:

The relevant capacitances may depend on bias and topology. At sufficiently high frequency, input current can be dominated by charging/discharging capacitance even though the DC leakage current is tiny.

FETs are commonly called unipolar because channel conduction is dominated by one carrier type. BJTs are bipolar because both carrier types participate in the injection/transport physics.

Around a declared DC operating point Q, each family can be locally characterized by how its main output current changes with a control voltage:

For the simplified BJT exponential model, gm=ICQ/VT. For the JFET and MOSFET models, gm follows by differentiating their transfer laws at Q. The numerical formulas differ because the underlying laws differ.

This is the bridge to amplifier analysis: a transistor can turn a small input-voltage increment into an output-current increment. Chapter 03 will derive these gm relations carefully after operating regions and bias have been established.

A common n-channel JFET is depletion-mode: it already has a physical channel and normally conducts at VGS=0. Reverse gate bias depletes the channel.

A common n-channel enhancement MOSFET is normally off in the ideal strong-inversion picture: positive VGS must exceed a threshold region before a strong inversion channel is established.

VTH is a model parameter extracted under a specified convention. It is not a sharp voltage below which absolutely no physical current can ever flow; subthreshold conduction and leakage remain real effects.

The correct question is not “which transistor formula do I remember?” but “which model applies to this device, operating region and required accuracy?”

1. For an NPN BJT with currents defined entering C and B and leaving E, write the current-conservation identity.
2. Why does IC≈βIB not define the physical control mechanism of a BJT?
3. What physical quantity changes when VGS becomes more negative in a normal n-channel JFET?
4. Why can MOSFET gate current be approximately zero in DC but nonzero during a fast transition?
5. Which of BJT, JFET and enhancement MOSFET is commonly normally on at VGS=0?
6. For IC=1 mA at 300 K, estimate BJT gm using gm≈IC/VT.
7. Name one assumption behind the MOS square-law model.
8. Explain why VTH is not an absolute “no current below here” boundary in a real MOSFET.

Chapter 02 will map each family into operating regions and DC bias constraints, so every later small-signal parameter is tied to a physically admissible Q-point.