A. S. Sedra & K. C. Smith, Microelectronic Circuits — single-stage BJT/MOS amplifiers.
Common-emitter/common-source gain, bias, loading, followers, current mirrors and active loads.
AE-02
Course overview
Single-stage amplifiers, followers & active loads
AE-02 turns transistor models into real amplifier stages. Every chapter keeps the same discipline: establish a valid DC Q-point, redraw the actual small-signal circuit, derive the result from KCL/KVL, then check loading, gain, output resistance and headroom.
5 chapters5 available · 0 plannedintermediate
Prerequisites
- AE-01 — BJT, JFET & MOSFET
- CT-01 — Thévenin/Norton
- AC-01 — phasors & impedance
By the end of the course
- Derive CE/CS gain from the real small-signal circuit.
- Analyze followers as buffers with explicit loading.
- Derive current mirrors as bias building blocks.
- Understand active loads and their effect on gain/output resistance.
- Trade gain, loading and output swing inside one design.
Syllabus
Five readings from inverting stages to active loads and output swing.
AE-02 turns transistor models into real amplifier stages. Every chapter keeps the same discipline: establish a valid DC Q-point, redraw the actual small-signal circuit, derive the result from KCL/KVL, then check loading, gain, output resistance and headroom.
- 01→
Common-emitter & common-source stages
Build the two canonical inverting voltage-amplifier stages from complete DC-biased circuits, not memorized gain formulas. Separate DC bias from midband AC, replace supplies by AC ground and coupling/bypass capacitors by their justified midband equivalents, then derive voltage gain from the verified hybrid-π/FET small-signal models. Include transistor output resistance, load resistance, input-divider loading, source resistance and emitter/source degeneration as explicit circuit effects rather than hidden corrections.
210–270 min · Intermediate · available - 02→
Emitter & source followers
Derive the two canonical non-inverting buffer stages from complete biased circuits and their real small-signal equivalents. Show why their voltage gain approaches but stays below unity, why their input resistance can be high and their output resistance low, how load resistance enters the gain directly, and how emitter/source degeneration is the operating principle rather than an unwanted correction.
190–245 min · Intermediate · available - 03→
Current mirrors
Build BJT and MOS current mirrors from matched transistor laws rather than treating them as ideal current sources. Derive the BJT base-current error, area scaling, compliance and Early-effect output resistance; derive MOS current-ratio scaling, saturation/compliance and channel-length-modulation error; then connect mismatch and temperature to practical bias accuracy.
195–250 min · Intermediate · available - 04→
Active loads
Replace passive collector/drain resistors by transistor current-source loads and derive why the incremental load resistance can become much larger than a practical resistor. Use complementary PNP/PMOS active loads, connect them to current mirrors, derive gain as gm times the parallel output resistances, then expose the price paid in compliance voltage, matching and finite output swing.
195–250 min · Intermediate · available - 05→
Gain, loading & output swing
Close the single-stage design loop by combining source attenuation, transistor-stage gain, output loading and large-signal headroom in one workflow. Start from a complete source–amplifier–load circuit, derive the source-to-load gain rather than an isolated intrinsic gain, locate the valid output window from device-region inequalities, translate that window back to an allowable input amplitude, and show how bias current, gm, output resistance and loading trade against one another.
210–270 min · Intermediate · available
Reference backbone
References used
The course follows standard analog-circuit texts and university material, with model assumptions stated before compact formulas are used.
B. Razavi, Fundamentals of Microelectronics — basic amplifier stages and biasing.
Physical interpretation of gain, degeneration, loading, output swing and transistor-stage tradeoffs.
A. Agarwal & J. H. Lang, Foundations of Analog and Digital Electronic Circuits.
Circuit-oriented derivation of transistor stages from DC operating point to incremental model.
MIT OpenCourseWare 6.002 — transistor amplifier lectures.
Small-signal stage analysis, input/output loading and gain derivations.
MIT OpenCourseWare 6.012 — microelectronic devices and circuits.
Device-model grounding for BJT and MOS amplifier operation and bias-region validity.