Cascode principle
Use a common-gate/common-base transistor above a common-source/common-emitter input device to separate high gain from large input-device drain/collector swing. Derive the low impedance of the internal node, the resulting suppression of Cgd/Cμ Miller multiplication, the large output resistance of the stacked pair, and the resulting pole redistribution. Treat the cascode as a trade among gain, reverse isolation, headroom, internal-node dynamics and output loading rather than as a universal bandwidth multiplier.
- Draw canonical MOS and BJT cascode topologies with explicit input, bias, internal and output nodes.
- Explain why the upper common-gate/common-base device holds the input transistor drain/collector at relatively small AC excursion.
- Approximate the small-signal resistance looking into the source/emitter of the upper device and connect it to the internal-node gain.
- Derive Av,x≈−gm1/gm2 for the lower-device drain/source internal node under stated approximations.
- Use Miller theory to show why Cgd1/Cμ1 input multiplication is greatly reduced in a cascode.
- Derive the first-order cascode output resistance rout≈ro1+ro2+gm2 ro1 ro2 and its gm·ro limit.
- Explain why high output resistance can increase voltage gain while also making the output-node pole potentially important.
- Identify the internal-node pole and explain why its low driving resistance often pushes it to relatively high frequency.
- Compare cascode, common-source/common-emitter and follower behavior in gain, reverse isolation, headroom and bandwidth.
- State when cascode assumptions fail: insufficient headroom, body effect, unequal gm, finite load resistance, device capacitances and additional parasitics.
Chapter 03 showed that Miller multiplication is driven by voltage difference across an input-output capacitance. The cascode attacks that mechanism physically: it inserts a common-gate/common-base device that keeps the input transistor's drain/collector from following the full output swing.
04.1The topology separates the internal node from the output node
Figure 4.1 — MOS cascode: common-source under common-gate
The one question is: which node must be prevented from making a large voltage excursion to suppress Miller multiplication?
M1 receives the signal. M2 has an AC-fixed gate bias and operates common-gate. The internal node x is M1 drain / M2 source. Cgd1 connects the input to x, not directly to the large-swing output vo.
M1 is common-source. M2 has its gate held at a fixed DC bias and, for small signal, at AC ground. The signal current generated by M1 flows through M2 to the output. The crucial node for Miller is x, not vo, because Cgd1 is connected between M1 gate and M1 drain.
04.2The upper device gives the internal node a low small-signal resistance
With the upper drain sufficiently stiff for the local estimate, and neglecting body effect and ro2 at first, the resistance looking into the source of the common-gate transistor is approximately
The lower transistor generates approximately gm1vi of small-signal drain current. Therefore
For comparable transconductances, x moves by order unity times vi, not by tens of vi as the output of a high-gain common-source stage can.
04.3Miller multiplication of Cgd1 collapses
Chapter 03 gives the input contribution of a bridge capacitance as C(1−Av). Here the relevant gain is gate-to-internal-node, not gate-to-output:
If gm1≈gm2, the factor is about 2. By contrast, a single common-source stage with Av≈−20 would give a factor near 21. This is the high-frequency core of the cascode principle.
04.4The internal node is often a fast pole
Figure 4.2 — Reduced model of the internal node x
The one question is: why does x move relatively little and often remain a fast node?
In the common-gate approximation M2 presents a low resistance Rx≈1/gm2 to x. The gm1·vi current from M1 therefore produces vx≈−gm1Rx·vi, while Cx sees the small time constant RxCx.
Let Cx collect the capacitances attached to the M1-drain/M2-source node under a chosen reduced model. Then
Because Rx is small, this pole can be pushed high. “Can” matters: body effect, finite ro, a moving upper drain and other parasitics modify Rx and Cx.
04.5The cascode also raises output resistance
To find output resistance, zero the input signal so M1 contributes ro1 to ground. Apply a test voltage vo at the drain of M2. With the M2 gate AC-grounded and body effect neglected, KCL at x gives the standard result
When gm2ro2≫1 and the ro values are comparable,
Thus the cascode can simultaneously suppress input-device Miller loading and raise output resistance.
04.6High output resistance helps gain but can slow the output node
With a finite load RL, a first-order midband gain estimate is
If the output node carries capacitance Co,
A larger rout raises gain but, when RL is also large, can lower the output pole. The cascode therefore redistributes poles: the input and internal nodes often become faster, while the output pole may become more important.
04.7Worked comparison with a single common-source stage
Suppose gm1=gm2=5 mS and Cgd1=0.20 pF. A single stage has midband gain −20. Its Miller input contribution is
For the cascode, use Avx≈−gm1/gm2≈−1:
The input contribution is reduced by about a factor 10.5 in this simplified comparison. The total circuit bandwidth still depends on Cgs, source resistance, the x-node pole and the output pole.
04.8Reverse isolation is improved for the same topological reason
Output disturbances couple back to the input mainly through device capacitances and finite reverse transfer. The upper common-gate/common-base device shields the lower drain/collector from the full output motion, reducing the voltage that appears across Cgd1/Cμ1. Cascode stages are therefore valuable not only for forward bandwidth but also for input-output isolation.
04.9The price is headroom and extra nonidealities
Two stacked transistors must both remain in their intended operating regions. This consumes voltage headroom and reduces available output swing. In MOS circuits, body effect can increase the effective common-gate transconductance term and alter Rx; finite ro, bias-network impedance, capacitances at x and vo, and mismatch all change the simple formulas.
At low supply voltage, folded cascodes and gain-boosted variants rearrange or actively enhance the basic principle, but they do not remove the need to check headroom and pole locations.
04.10Mastery exercises
- For gm1=4 mS and gm2=8 mS, estimate Avx and the Miller factor multiplying Cgd1.
- For gm2=6 mS and Cx=0.5 pF, estimate the internal-node pole using Rx≈1/gm2.
- For ro1=ro2=40 kΩ and gm2=5 mS, estimate cascode rout.
- If Co=0.8 pF and RL≫rout, estimate the output pole from the result of Exercise 3.
- Explain why a cascode can reduce input Miller loading yet still have a low output pole.
- Name two headroom/nonideality limits absent from the ideal formulas.
Solutions
1. Avx≈−0.5, so the factor is 1−(−0.5)=1.5.
2. Rx≈166.7 Ω; fp,x≈1/[2π·166.7 Ω·0.5 pF]≈1.91 GHz.
3. rout≈40 kΩ+40 kΩ+5 mS·(40 kΩ)^2≈8.08 MΩ.
4. fp,o≈1/[2π·8.08 MΩ·0.8 pF]≈24.6 kHz. This intentionally extreme unloaded example shows why output loading matters.
5. The internal input-transistor drain is low impedance, suppressing Miller, while the external output node can be very high impedance and therefore slow with Co.
6. Examples: saturation/headroom constraints, body effect, finite ro, unequal gm, bias-network impedance, parasitic capacitances.
Chapter 05 closes AE-04 by adding noise sources and showing how bandwidth, transconductance, resistance and capacitance choices trade against integrated noise.