AE-04
Course overview

Frequency response, Miller effect, cascode & noise

AE-04 begins where the midband transistor model stops being sufficient. Internal charge storage first creates frequency-dependent device models; those elements then generate amplifier poles and zeros, Miller multiplication, cascode bandwidth changes and finally noise/bandwidth trade-offs. Each chapter keeps the device model tied to the actual biased circuit rather than treating frequency response as a detached transfer-function exercise.

5 chapters5 available · 0 plannedadvanced
Prerequisites
  • AE-01 — transistor small-signal models
  • AE-02 — single-stage amplifiers & active loads
  • AC-02 — transfer functions & Bode
  • DY-02 — poles, damping & resonance
By the end of the course
  • Build BJT/MOS high-frequency models from charge storage.
  • Derive amplifier poles and zeros from the small-signal circuit.
  • Derive the Miller effect instead of applying it as a memorized rule.
  • Explain how cascode topology changes gain, coupling and bandwidth.
  • Calculate and interpret thermal, shot/flicker noise and noise–bandwidth trade-offs.
Syllabus

Five readings from charge storage to noise–bandwidth trade-offs.

AE-04 begins where the midband transistor model stops being sufficient. Internal charge storage first creates frequency-dependent device models; those elements then generate amplifier poles and zeros, Miller multiplication, cascode bandwidth changes and finally noise/bandwidth trade-offs. Each chapter keeps the device model tied to the actual biased circuit rather than treating frequency response as a detached transfer-function exercise.

  1. 01

    Transistor high-frequency models

    Extend the low-frequency BJT and MOS small-signal models by adding the charge-storage paths that become electrically active as frequency rises. Derive how Cπ/Cμ or Cgs/Cgd/Cdb create frequency-dependent input and output currents, distinguish current-gain pole fβ from transition frequency fT, and keep intrinsic device speed separate from the bandwidth of a complete amplifier that also contains source, load and feedback impedances.

    220–280 min · Advanced · available
    →
  2. 02

    Poles and zeros in amplifiers

    Move from device capacitances to the frequency response of a complete biased stage. Derive poles from the natural-response denominator rather than assigning one pole per capacitor, derive zeros from feed-forward terms in the transfer numerator, solve a separated two-node amplifier exactly, introduce open-circuit time constants as an approximation tool, and show how Cgd/Cμ can create a right-half-plane zero even before the Miller approximation is invoked.

    230–290 min · Advanced · available
    →
  3. 03

    Miller effect

    Derive the Miller transformation from the current through a two-node impedance rather than memorizing a multiplied-capacitance rule. Show that an impedance Z between nodes v1 and v2=Av·v1 can be replaced, for that transfer relation, by Zin=Z/(1−Av) and Zout=Z/(1−1/Av). Specialize to Cgd/Cμ, explain why inverting gain creates a large apparent input capacitance, why a follower can bootstrap the same capacitor, and where the approximation fails when Av is frequency dependent.

    220–280 min · Advanced · available
    →
  4. 04

    Cascode principle

    Use a common-gate/common-base transistor above a common-source/common-emitter input device to separate high gain from large input-device drain/collector swing. Derive the low impedance of the internal node, the resulting suppression of Cgd/Cμ Miller multiplication, the large output resistance of the stacked pair, and the resulting pole redistribution. Treat the cascode as a trade among gain, reverse isolation, headroom, internal-node dynamics and output loading rather than as a universal bandwidth multiplier.

    230–290 min · Advanced · available
    →
  5. 05

    Noise sources & bandwidth trade-offs

    Treat electronic noise as a spectral quantity before integrating it into an RMS voltage or current. Fix a one-sided PSD convention, derive resistor thermal noise, shot noise and transistor channel noise models, introduce flicker noise and input-referred noise, propagate independent sources through their own transfer functions, define equivalent noise bandwidth, derive kT/C for an RC network, and connect bandwidth, gm, resistance, device area and capacitance to quantitative noise trade-offs.

    240–300 min · Advanced · available
    →
Reference backbone

References used

High-frequency transistor models and amplifier response are anchored in Sedra/Smith, Razavi and Gray et al.; the final noise chapter adds van der Ziel for the physical/statistical noise foundation.

01
A. S. Sedra & K. C. Smith, Microelectronic Circuits — frequency response of amplifiers and high-frequency transistor models.

BJT/MOS high-frequency small-signal models, amplifier poles, Miller effect and bandwidth analysis.

02
B. Razavi, Fundamentals of Microelectronics — frequency response and noise chapters.

Physical interpretation of device capacitances, open-circuit time constants, Miller effect, cascode bandwidth and electronic noise.

03
B. Razavi, Design of Analog CMOS Integrated Circuits.

MOS high-frequency models, cascode stages, frequency response and integrated-circuit noise reasoning.

04
P. R. Gray, P. J. Hurst, S. H. Lewis & R. G. Meyer, Analysis and Design of Analog Integrated Circuits.

High-frequency transistor models, pole/zero analysis, cascodes, compensation and noise in analog IC stages.

05
A. van der Ziel, Noise in Solid State Devices and Circuits.

Physical and statistical foundations for thermal, shot and flicker noise used in the final chapter.