03 · Intermediate

Rectifiers

Use diode state logic to derive AC-to-unidirectional conversion rather than memorizing waveforms. Analyze the resistive-load half-wave rectifier, derive its average and RMS output, extend the same reasoning to a full-wave bridge and its two-diode conduction paths, then add a reservoir capacitor and derive the small-ripple approximation ΔV≈Iload/(fripple C) with explicit assumptions. Separate output ripple from diode/source pulse current, voltage stress and safety limits.

190–245 minIntermediate
In this lesson
  • Draw and label the half-wave rectifier with explicit vin, vo, diode current and load-current references before writing its piecewise equations.
  • Derive the ideal half-wave output vo(t)=max[0,vin(t)] and extend it to a constant-drop diode model.
  • Derive the average and RMS values of an ideal half-wave-rectified sinusoid.
  • Trace the two alternating conduction paths of a four-diode bridge while proving that load current keeps the same polarity.
  • Derive the ideal bridge output vo(t)=|vin(t)| and the first-order constant-drop approximation max[0,|vin|−2Vγ].
  • Derive the average and RMS values of an ideal full-wave-rectified sinusoid.
  • Explain how a reservoir capacitor charges near waveform peaks and discharges through the load between peaks.
  • Derive ΔV≈Iload/(fripple C) and VDC≈Vpeak−NdropVγ−ΔV/2 under a declared small-ripple/approximately constant-load-current assumption.
  • Distinguish ripple frequency for half-wave and full-wave rectification and explain why diode/source current occurs in short pulses rather than equal to the load current waveform.
  • State topology-specific reverse-voltage/current stress and low-voltage isolation/safety checks before turning a rectifier calculation into hardware.
Starting question

A rectifier uses diode state changes to enforce one load-current polarity. Its raw output still varies strongly with time; a reservoir capacitor adds memory and pulsed charging current.

03.1Half-wave state solution

Figure 3.1 — Half-wave rectifier

The one question is: which references define vin, vo, iD and iL?

+−vinDRLGNDiDiL+−vo

During the conducting half-cycle, iD=iL and vo follows the input minus diode drop; during the blocked half-cycle, iD=0.

vin=Vmsinθ
vo=Vmsinθ, 0<θ<π
vo=0, π<θ<2π

Thus ideal vo=max(0,vin). With a constant drop, conduction requires vin>Vγ and vo≈vin−Vγ while ON.

03.2Half-wave average and RMS

Vavg=Vm/π
Vrms=Vm/2

Average is the DC component; RMS determines resistor heating. With Vγ and θ0=asin(Vγ/Vm), conduction is θ0 to π−θ0 and

Vavg=[2Vmcosθ0−Vγ(π−2θ0)]/(2π)

Subtracting Vγ from the ideal average is therefore not exact because conduction angle also changes.

03.3Full-wave bridge paths

Figure 3.2 — Graetz bridge: two paths, one load polarity

The one question is: which pair conducts when A and then B is the positive AC terminal?

AC terminal AAC terminal BD1D2D3D4RL+−voiLA positive: D1 + D4B positive: D2 + D3

D1 and D2 meet the + node at their cathodes; D3 and D4 leave the − node at their anodes. Whichever AC terminal is instantaneously positive, current crosses RL from + to −.

vo=|vin| (ideal)
vo≈max[0,|vin|−2Vγ]

Two bridge diodes conduct in series during either half-cycle, while load-current polarity stays fixed.

03.4Full-wave average and RMS

Vavg,FW=2Vm/π
Vrms,FW=Vm/√2

Ideal full-wave rectification changes the sine average from zero to 2Vm/π while preserving its RMS magnitude across a resistor.

03.5Reservoir capacitor adds a state

Figure 3.3 — Half-wave rectifier with reservoir capacitor

The one question is: where do recharge current and load current flow?

+−vinDRLCGNDiDiL+−vo

The capacitor is in parallel with the load. The diode conducts only when the source rises enough above stored capacitor voltage, so diode current becomes pulsed.

C charges near input peaks when the source exceeds the stored capacitor voltage plus diode drop. After the source falls, the diode turns OFF and C supplies the load. Diode current is therefore concentrated into recharge pulses.

03.6Small-ripple derivation

Figure 3.4 — Small-ripple approximation

The one question is: how does ΔV follow from discharge time between recharge events?

tvodischarge ≈ linearΔVΔt ≈ 1/fripple

Between recharge events separated by Δt≈1/fripple, the capacitor supplies approximately Iload and loses ΔV≈IloadΔt/C.

C dvo/dt≈−Iload
ΔVpp≈Iload/(frippleC)
fripple=fin (half-wave)
fripple=2fin (bridge)

For small approximately triangular ripple,

VDC≈Vpeak−NDVγ−ΔVpp/2

ND=1 for the simple half-wave path and 2 for a bridge path.

03.7Load coupling and self-consistency

Iload≈VDC/RL
ΔVpp≈VDC/(RLfrippleC)

Example: bridge, Vpeak=10 V, Vγ=0.7 V, RL=1 kΩ, C=470 μF, fin=50 Hz. Solving the approximation self-consistently gives VDC≈8.51 V and ΔVpp≈0.181 V.

03.8Low ripple can mean high charging pulses

ΔQload≈Iload/fripple

Increasing C reduces ripple but usually narrows the recharge interval. Peak current then depends on source/transformer impedance, diode dynamic resistance, capacitor ESR and waveform shape. The ripple formula alone does not predict peak diode current.

03.9Reverse voltage and hardware safety

Reverse stress is topology-specific. A resistive half-wave diode sees about Vm peak reverse voltage; with a charged reservoir capacitor it can approach roughly 2Vm in the idealized light-load limit. In a conventional ideal bridge, the reverse stress of one diode is instead typically of order the input peak; derive it from the actual topology rather than importing the half-wave result. Current ratings must include repetitive charging pulses and inrush.

03.10Mastery exercises

  1. Ideal half-wave, Vm=12 V: Vavg and Vrms?
  2. Ideal bridge, Vm=12 V: Vavg and Vrms?
  3. Vm=5 V,Vγ=0.7 V half-wave: θ0 and conduction interval?
  4. Why two diode drops in a bridge path?
  5. Full-wave bridge at 60 Hz: ripple frequency?
  6. Iload=20 mA,C=1000 μF,full-wave 50 Hz: ΔVpp?
  7. What happens to ripple and charging pulses when C doubles?
  8. Why can a capacitor-filtered half-wave diode require nearly 2Vm reverse rating?
Solutions

1. 12/π≈3.82 V; 6 V.

2. 24/π≈7.64 V; 12/√2≈8.49 V.

3. θ0=asin(0.14)≈8.05°; about 8.05° to 171.95°.

4. Two diodes conduct in series.

5. 120 Hz.

6. 0.20 V.

7. Ripple roughly halves, while charging pulses can become narrower/higher.

8. At negative input peak, source voltage adds to the still-positive stored capacitor voltage across the blocked diode.