Clamps & limiters
Separate two diode waveform operations that are often confused. A limiter clips selected amplitude regions by switching a diode into conduction; a clamper uses a diode plus capacitor to translate a waveform’s DC level while approximately preserving peak-to-peak span. Derive upper, lower and biased limiters with explicit source resistance and current limiting, then derive an ideal/constant-drop positive clamper from capacitor charge and show how finite off-state time constant causes droop.
- Distinguish a limiter/clipper from a clamper by topology, stored energy and waveform effect.
- Draw an upper shunt limiter with explicit vin, vo, R, diode current and reference-voltage polarity before writing piecewise equations.
- Derive the upper-limit condition vo≈min(vin,Vref+Vγ) only under the declared high-impedance-load approximation.
- Derive diode current and resistor dissipation during clipping and explain why the series resistor is not optional.
- Reverse the diode orientation to obtain a lower limiter and combine two branches to form a dual-window limiter.
- Use an external bias reference to place positive/negative clip levels away from ground and track the sign of Vref correctly.
- Derive an ideal positive clamper by enforcing the diode ON state at the negative input peak and storing capacitor voltage.
- Extend the clamper result to a constant forward drop and show that peak-to-peak span is approximately preserved while DC level shifts.
- Define the off-state capacitor time constant τoff=RseenC and derive the first-order droop estimate 1−exp(−Δt/τoff)≈Δt/τoff for τoff≫Δt.
- Explain startup, source/load dependence, diode capacitance and charge-storage limits that distinguish a real clamper from the ideal charge-holding model.
Both limiters and clampers use diodes, but they do not do the same job. A limiter is primarily a nonlinear amplitude selector. A clamper is a dynamic level shifter whose capacitor stores the offset.
04.1Limiter and clamper are different models
Figure 4.4 — Limiting clips span; clamping translates level
The one question is: which operation changes Vpp and which mainly shifts the average level?
In the ideal no-droop model, a clamper preserves the input peak-to-peak span; a limiter instead replaces waveform portions that exceed its thresholds.
A memoryless limiter can be analyzed instant by instant from diode state and resistor currents. A clamper contains C, so its present output depends on stored charge and therefore on earlier waveform history.
04.2Upper shunt limiter from the circuit, not a memorized threshold
Figure 4.1 — Biased upper shunt limiter
The one question is: why is vo free below threshold but held near Vref+Vγ above it?
R limits current when D conducts. The output is assumed high impedance so OFF gives vo≈vin; a finite load must be included explicitly as a divider.
Let D have anode at vo and cathode at Vref. With a constant forward drop Vγ and high-impedance output load:
If D is OFF, iD=0, so current through R is zero and vo=vin.
If D is ON,
ON is self-consistent only when iD≥0, hence vin≥Vref+Vγ. Therefore
This compact min-expression is not universal: it assumes the shown orientation, a stiff Vref and negligible load current while OFF.
04.3The series resistor sets clipping current and power
During upper clipping, the excess source voltage falls across R:
Example: Vref=2.0 V, Vγ=0.7 V, R=1 kΩ and vin=5 V. Then vo≈2.7 V, iD≈2.3 mA and pR≈5.29 mW.
Removing R from an ideal-voltage-source limiter leaves no element to set current after the diode clamps voltage. The ideal model would then demand an undefined/unbounded current. The resistor is therefore part of the circuit function, not decorative protection.
04.4Lower and dual limiters follow by orientation
Figure 4.2 — Two-branch limiting window
The one question is: which branch fixes the upper level and which fixes the lower level?
The upper branch conducts when vo tries to exceed VH+Vγ; the oppositely oriented lower branch conducts when vo tries to fall below VL−Vγ.
For the lower branch, place the diode anode at VL and cathode at vo. It conducts when VL−vo≥Vγ, giving
Combining upper and lower branches around one series resistor gives the idealized window
If the two requested limits overlap or if the reference supplies cannot sink/source the required branch currents, the simple piecewise picture breaks down. Bias references are circuit elements with finite capabilities.
04.5Finite load changes the OFF-state transfer
Suppose RL is connected from vo to ground. When the clipping diode is OFF, R and RL form a divider:
The diode state must then be tested using this loaded vo, not vin. Loading can shift the input value at which clipping begins even though the clamp voltage itself remains tied to the reference branch while ON.
This is another reason to define the full circuit before writing a one-line “clip at 2.7 V” rule.
04.6Positive clamper: solve the charging event first
Figure 4.3 — Positive clamper: the capacitor stores the shift
The one question is: what vC is stored when the negative input peak forces D ON?
D has its anode at ground and cathode at vo, so it conducts when vo tries to become sufficiently negative. RL provides the leakage path that helps set τoff.
Define capacitor voltage from input side to output side:
For the shown diode, anode is at ground and cathode at vo. With an ideal diode, the most negative input peak vin=−Vm drives D ON and clamps vo≈0. Therefore
If C is large enough that vC changes negligibly while D is OFF, then
A symmetric input spanning −Vm to +Vm is translated approximately to 0 to 2Vm. Its peak-to-peak span remains ≈2Vm.
04.7Constant diode drop shifts the clamp level
With constant forward drop Vγ, conduction at the negative peak clamps the output near −Vγ because the diode anode is at zero:
During the nearly charge-holding OFF interval,
Thus the approximate range is −Vγ to 2Vm−Vγ. For Vm=3 V and Vγ=0.7 V, the output spans about −0.7 V to +5.3 V: still ≈6 V peak-to-peak, but shifted upward.
04.8Finite time constant produces droop
When D is OFF, the capacitor sees some effective resistance Rseen determined by the source resistance, load and any other paths with independent sources zeroed:
If the stored offset would decay exponentially over a relevant off interval Δt, the fraction lost is
For τoff≫Δt, use e−x≈1−x:
If τoff=100T and the relevant hold interval is about one period T, the first-order droop estimate is ≈1%; the exact exponential loss is 1−e−0.01≈0.995%.
A practical design chooses τoff from an allowed droop error, not merely “large RC.”
04.9Startup and nonideal dynamic effects
A clamper cannot instantly begin with the steady stored vC unless the capacitor is precharged. The first few cycles establish the operating charge through diode conduction.
At higher frequency or faster edges, junction capacitance, diffusion/storage charge, reverse recovery, source resistance and parasitic inductance alter the charging pulse and clamp level. A simple constant-drop diode plus ideal C is then insufficient.
Conversely, a limiter without intentional energy storage is mainly static; adding diode capacitance or external C makes its transient response frequency-dependent.
04.10Mastery exercises
- Upper limiter: Vref=1.5 V,Vγ=0.6 V,R=2 kΩ,vin=5 V. Find vo,iD and pR during clipping.
- What is the upper threshold if Vref=−1 V and Vγ=0.7 V?
- Lower limiter with VL=−2 V,Vγ=0.7 V: what output level is enforced while ON?
- Dual limiter with VL=−2 V,VH=+2 V,Vγ=0.7 V: state the approximate output window.
- With R=1 kΩ and RL=4 kΩ, what is vo/vin in the diode-OFF state?
- Ideal positive clamper with vin spanning ±4 V: output range?
- Same clamper with Vγ=0.65 V: approximate output range?
- If τoff=50T, estimate exact and first-order fractional droop over one T.
Solutions
1. Threshold=2.1 V; vo≈2.1 V; iD≈(5−2.1)/2kΩ=1.45 mA; pR≈4.21 mW.
2. −1+0.7=−0.3 V.
3. VL−Vγ=−2.7 V.
4. Approximately −2.7 V to +2.7 V.
5. 4/(1+4)=0.8.
6. Approximately 0 to 8 V.
7. Approximately −0.65 V to 7.35 V.
8. Exact: 1−e−1/50≈1.98%; first order: 1/50=2%.
Chapter 05 will generalize the state-check logic into a systematic nonlinear DC bias workflow: formulate residual equations, find all physically admissible operating points, linearize with the Jacobian and use convergence/model checks rather than trusting one numerical root blindly.