05 · Intermediate

Nonlinear DC bias point

Turn nonlinear circuit biasing into a systematic equation-solving problem. Start from topology, references and device models, formulate scalar or vector residuals F(x)=0, prove uniqueness for the simple resistor–diode load-line case, derive Newton and the Jacobian for coupled diode networks, add damping and convergence checks, search for multiple admissible roots when the circuit allows them, then recover the small-signal model from the Jacobian evaluated at Q. Finish with independent KCL, power, model-domain and perturbation checks.

195–250 minIntermediate
In this lesson
  • Formulate a nonlinear DC operating point as simultaneous KCL/element-law residual equations F(x)=0 rather than as an informal graphical guess.
  • Show that the one-resistor/one-exponential-diode bias equation has one root because its scalar residual is strictly increasing.
  • Derive Newton’s scalar update and explain why a numerically converged root still requires physical/model checks.
  • Build a two-node nonlinear residual vector for a resistor network with two diode branches.
  • Derive the full Jacobian matrix from resistor conductances and local diode slopes.
  • Write the multidimensional Newton step J(xk)Δx=−F(xk), xk+1=xk+Δx.
  • Use damping/line search when a full Newton step leaves the model domain or increases the residual.
  • Distinguish numerical convergence from uniqueness and explain why multiple initial guesses or continuation may be required in circuits with multiple operating points.
  • Validate a candidate Q-point using KCL residuals, branch-current consistency, power signs and the declared validity range of each compact model.
  • Show that the same Jacobian/local derivatives used by Newton become the linearized small-signal network around Q.
Starting question

Once several nonlinear branches interact, “guess a diode voltage” stops being a method. A DC operating point is the simultaneous solution of circuit conservation laws and nonlinear constitutive laws.

05.1From a circuit to F(x)=0

Figure 5.1 — Q satisfies two laws at once

The one question is: which two relations must be true simultaneously?

+−VsRDGNDiD+−vD

The resistor imposes i=(Vs−vD)/R; the diode imposes i=ID(vD). Q is their intersection, equivalently a root of one scalar residual.

Choose independent unknown node voltages or branch variables, fix all voltage/current references, and write one independent KCL equation per unknown node. Substitute each element’s constitutive law. Move everything to one side:

F(x)=0

For the one-resistor/one-diode circuit with x=vD,

F(v)=IS[exp(v/(nVT))−1]−(Vs−v)/R

A root is not an abstract numerical object: it is the voltage at which diode current and resistor current are simultaneously consistent.

05.2The simple load-line problem has one root

Differentiate the scalar residual:

F′(v)=ISexp(v/(nVT))/(nVT)+1/R

Every term is positive for R>0, so F is strictly increasing. In addition, F becomes negative for sufficiently negative v and positive for sufficiently large positive v. Therefore this ideal resistor–exponential-diode problem has exactly one real operating point.

This proof matters: Newton convergence and root uniqueness are different questions. Here uniqueness follows from circuit/model monotonicity, not from the numerical algorithm.

05.3Newton is repeated local linearization

At trial vk, replace F by its tangent and ask where that tangent crosses zero:

F(v)≈F(vk)+F′(vk)(v−vk)
vk+1=vk−F(vk)/F′(vk)

Near a well-behaved root, Newton can converge very rapidly. Far from it, the exponential slope can make a full step poor.

Figure 5.3 — One Newton step is not yet validation

The one question is: which stages separate an initial guess from an accepted Q-point?

xkF(xk), J(xk)JΔx=−Fstep testxk+1physical validation

Residual norm governs numerical convergence; state admissibility, power and model-domain checks govern physical acceptance.

A robust solver therefore tracks both step size and residual. “The voltage stopped changing” is not enough if F remains large.

05.4Coupled nonlinear nodes produce a residual vector

Figure 5.2 — Two-node nonlinear network

The one question is: how do we write one independent KCL residual at each node?

+−VsR1R12D1D2GNDv1v2iD1iD2

v1 and v2 are the unknowns. Each diode links branch current to its local voltage; R12 couples the two node equations.

For the shown network, let both diodes use current from node to ground. Define

ID1(v1)=IS1[exp(v1/(n1VT))−1]
ID2(v2)=IS2[exp(v2/(n2VT))−1]

KCL gives

F1=(v1−Vs)/R1+(v1−v2)/R12+ID1(v1)=0
F2=(v2−v1)/R12+ID2(v2)=0

Now x=[v1,v2]ᵀ and F=[F1,F2]ᵀ. Solving one diode independently is impossible because R12 couples both node voltages.

05.5Derive the Jacobian from local branch slopes

Define local diode conductances

gd1=dID1/dv1
gd2=dID2/dv2

The Jacobian J=∂F/∂x is

J11=1/R1+1/R12+gd1
J12=−1/R12
J21=−1/R12
J22=1/R12+gd2

At iteration k, solve the linear system

J(xk)Δx=−F(xk)
xk+1=xk+Δx

The off-diagonal terms are the coupling introduced by R12. The diode derivatives affect only the diagonal entries because each diode current depends only on its own node voltage in this model.

05.6Worked two-node operating point with independent KCL checks

Choose purely pedagogical values

Vs=5 V, R1=2 kΩ, R12=1 kΩ
IS1=IS2=1 pA, n1=n2=1, T=300 K

Newton applied to the two coupled residuals converges to approximately

v1=0.555346 V
v2=0.471592 V

Compute currents independently:

IR1=(5−v1)/2kΩ≈2.222327 mA
IR12=(v1−v2)/1kΩ≈83.754 μA
ID1≈2.138573 mA
ID2≈83.754 μA

Node checks:

IR1≈ID1+IR12
IR12≈ID2

Those checks are independent of the internal stopping criterion used by the solver.

05.7Damping, scaling and line search make Newton safer

If a full Newton step increases the residual or jumps into an invalid model region, use

xk+1=xk+λΔx, 0<λ≤1

Choose λ so a residual norm decreases or so variables remain inside declared model limits. This is a line-search/damped-Newton idea.

Residual components should also be scaled sensibly. Comparing 1 A and 1 μA equations with the same absolute tolerance can hide a poor small-current balance; voltage/current tolerances need physical meaning.

A good stop test combines a small scaled residual with a small update. Neither test alone is sufficient.

05.8One converged root does not prove it is the only root

The simple passive diode examples above are monotone and well behaved. General nonlinear circuits can contain feedback, controlled sources or devices with non-monotone regions and can admit multiple DC operating points.

Practical checks include multiple physically different initial guesses, gradual source stepping/continuation, and comparison with piecewise state enumeration when such a model is available.

For a piecewise ideal-diode network, every assumed ON/OFF state is a candidate linear problem. Solve each candidate and reject any solution violating its own ON/OFF inequalities. The surviving states are the admissible operating points of that approximation.

A solver reporting “converged” means only that it found a local root according to its numerical criteria.

05.9The Jacobian becomes the small-signal network

Figure 5.4 — The Jacobian is also the incremental network

The one question is: why do the gd values used by Newton reappear in small-signal analysis?

nonlinear at QDVDQ, IDQ→linearizeincrementalrd=1/gdvd, id

At Q, each diode branch becomes gd (or rd=1/gd) to first order. The linearized network coefficients are exactly the derivatives that form J.

Let x=xQ+δx and allow a small input perturbation δu. Taylor expansion of the residual gives

0≈F(xQ,uQ)+JQδx+BQδu

Because F(xQ,uQ)=0,

JQδx=−BQδu

The diode entries inside JQ are exactly gd values from AE-00.02. Thus DC Newton and small-signal analysis are not unrelated techniques: both use the same local derivative of the nonlinear device law.

Only after Q is known may those gd or rd values be frozen to build the incremental circuit.

05.10Validation workflow and mastery exercises

For every nonlinear DC solution: (1) reconstruct all branch currents from the original device laws; (2) recompute KCL residuals; (3) check assumed piecewise states; (4) check power signs and source/load consistency; (5) verify model ranges, temperature and bias; (6) perturb the initial guess or source slightly and confirm expected behavior.

  1. For the scalar resistor–diode residual, prove F′(v)>0 when R>0 and n,VT,IS are positive.
  2. Why does F′>0 prove at most one root but not by itself prove existence?
  3. Write the Newton update for F(v)=IS[exp(v/(nVT))−1]−(Vs−v)/R.
  4. For the two-node network, derive J12 and J21 from R12.
  5. Using the worked solution, verify node-1 KCL numerically to within about 1 μA.
  6. At the worked Q-point, estimate gd1 and rd1 using ID1≈2.1386 mA at 300 K,n=1.
  7. Why can a full Newton step be dangerous far from a diode operating point?
  8. Explain why repeating Newton from the same initial guess cannot test for multiple roots.
  9. What extra condition must an ON solution satisfy in an ideal-diode state enumeration?
  10. Why is the Jacobian evaluated at Q the correct starting point for small-signal analysis?
Solutions

1. F′=IS exp(v/(nVT))/(nVT)+1/R; every term is positive.

2. A strictly increasing function may remain entirely above or below zero; existence additionally needs a sign crossing or another existence argument.

3. vk+1=vk−F(vk)/F′(vk).

4. Both are −1/R12 because increasing the other node reduces the current leaving the node through R12.

5. 2.138573 mA+0.083754 mA≈2.222327 mA.

6. gd1≈ID1/VT≈0.0827 S, so rd1≈12.1 Ω.

7. The local tangent can badly approximate the exponential far from Q and produce an oversized step.

8. It reproduces the same local basin; use distinct guesses or continuation paths.

9. Its solved current must satisfy the model’s forward-current inequality; OFF states must satisfy the corresponding reverse-voltage inequality.

10. JQ contains the first derivatives of every nonlinear branch at the actual bias point, which are precisely the incremental conductances.

AE-00 is now conceptually complete: physical I–V law → controlled approximations and local linearization → rectification → limiting/clamping → systematic nonlinear operating-point solution. The next course can introduce transistor operating regions and bias without treating nonlinear DC analysis as a black box.