Calibration and RF reference planes
Derive systematic one-port VNA error correction with three standards, compare SOLT and TRL, translate phase/reference planes, and de-embed independently characterized fixture error boxes.
- Locate an actual VNA calibration plane and distinguish it from DUT terminals.
- Invert the three-term one-port directivity/tracking/source-match model.
- Solve complex calibration coefficients from three standards and examine conditioning.
- Explain RF parasitics in short/open/load standards.
- Translate reflection through a known lossless or lossy line segment.
- State the assumptions and scope of SOLT calibration.
- Explain TRL phase-length conditions and multiline extensions.
- Derive de-embedding from cascaded fixture chain matrices.
- Calculate a guided-wave phase correction at 1 GHz.
- Propose a reproducible VNA verification protocol with uncertainty controls.
A calibrated VNA does not report the DUT at an arbitrary physical interface: it estimates a wave-ratio response at specified reference planes through an instrument error model. This chapter derives a three-term one-port correction, the equations solved by real calibration standards, physical reference-plane motion, SOLT and TRL logic, and the limits of fixture de-embedding.
0102.1 — What a calibration plane really means
A VNA acquires raw complex receiver ratios. The error model transforms these ratios into incident/reflected waves at a physical calibration plane, ideally at the connector or probe tip where characterized standards have been attached. A PCB launch, coax adapter, microprobe pad or measurement fixture beyond that plane remains part of the reported DUT unless separately modeled.
Use the three-term model to distinguish true reflection from the raw measured ratio m. The complex coefficients E_D, E_R and E_S depend on frequency, receivers, couplers, cables and calibration stability. They are not intrinsic properties of the resistor or antenna under investigation.
0202.2 — Derive the three-standard calibration equations
Set and rearrange the error equation into . A characterized calibration standard supplies its known complex reflection _i at the calibration plane, while the VNA records m_i. Three suitably distinct standards yield a 3×3 linear system for E_D, t and E_S.
Recover and invert the measured response of an unknown load. The coefficient matrix must be well conditioned. Three standards with nearly equal responses do not identify the error terms reliably, even if the computer produces a numerical inverse.
0302.3 — Why real opens, shorts and loads need models
Ideal short, open and perfectly matched standards have at a chosen real positive reference R0. Real opens possess fringing capacitance; shorts can include offset inductance, finite conductor resistance and delay; a matched load has residual frequency-dependent mismatch.
Calibration kits provide electrical models or measured coefficients for their standards. Swapping uncharacterized standards into a calibration changes the inferred DUT response, especially at RF and microwave frequencies. Verify calibration using a different known standard and record connector, torque or probe landing repeatability.
0402.4 — Plane extension is propagation, not fixture removal
For a known uniform single-mode section of length d between the DUT and a measurement plane toward the source, the complex reflection is multiplied by exp[−2(α+jβ)d]. Thus both magnitude and phase change when attenuation α is nonzero, while for an ideal lossless line only phase changes.
Under exp(+jωt), an extension rotates reflection by . Its inverse recovers the DUT plane. A VNA port-extension feature based on a single effective delay cannot account for a strongly mismatched connector or a fixture with multiple internal reflections.
0502.5 — What a SOLT calibration actually uses
A standard two-port Short–Open–Load–Through (SOLT) procedure attaches characterized standards to estimate the systematic error coefficients in a particular receiver and switch architecture. The through standard connects the ports with a known or characterized transmission relationship.
There is no universal single set of error coefficients for every VNA implementation. Isolation, tracking and load-match corrections vary with calibration configuration, switch terms, measurement direction and hardware. Use the instrument manual and its exact standards database rather than assuming an arbitrary open or short behaves ideally at all frequencies.
0602.6 — How TRL uses guided phase separation
Thru–Reflect–Line (TRL) calibration uses a thru connection, a reflection standard and a transmission-line standard; it can be attractive in planar and on-wafer technologies for which a broadband lumped 50-ohm load is hard to realize at the reference plane.
The line must provide a sufficiently distinct propagation phase relative to the thru: phase differences near integer multiples of π are poorly conditioned in many TRL solutions. Multiline TRL uses several lengths to maintain useful separation. The solved impedance reference is tied to the chosen line and method, not guaranteed independently to equal 50 Ω.
0702.7 — Cascade error boxes and real de-embedding
For fixture networks whose chain representation is defined consistently, the measured two-port is a cascade of left fixture, intrinsic DUT and right fixture. If both fixture transmission matrices are independently determined and invertible, .
This removal must preserve the ABCD convention [V2,−I2] while both DUT port currents enter their positive terminals. A simple scalar loss offset or a change of reference impedance cannot remove an unknown distributed launch or radiating fixture. Different de-embedding structures and their uncertainties must be validated separately.
Figure 5.2 — Signed electrical references of a two-port
Both I₁ and I₂ are defined ENTERING the network at their positive terminals; each voltage arrow points from minus to plus.
I₁ enters the left port pointing right, while I₂ enters the right port pointing left. V₁ and V₂ are positive on the upper terminals. The conventional output current toward an attached load equals −I₂. These arrows define references, not actual solved current flow.
0802.8 — Numerical reference-plane exercise and laboratory protocol
At 1 GHz with hypothetical lossless phase velocity , the guided wavelength is 0.20 m. A distance of 0.025 m corresponds to and rotates to at the external reference plane. With a known α>0, the magnitude is multiplied by .
In practice record the instrument firmware and calibration kit models, frequency sweep, source level, IF bandwidth and port planes; calibrate, then verify with an independent load or thru. Repeat connector mating, export complex Touchstone data and compare the result to a circuit model, keeping fixture de-embedding separate from basic error correction.
Calibration exercises — worked solutions
- Explain the distinction between a physical DUT interface and a VNA calibration plane.
- Rearrange a three-term one-port error equation and derive the correction for Γ.
- Show the 3×3 system that solves error coefficients from three known standards.
- Identify parasitics in real open, short and load standards and explain calibration uncertainty.
- Compute the effect of a λg/8 lossless reference-plane extension on a complex Γ.
- Derive reference-plane correction when α is nonzero.
- Compare SOLT standards and explain why the thru and both measurement directions matter.
- Explain why a TRL line length has a finite well-conditioned frequency span.
- Derive fixture cascade de-embedding and state the matrix invertibility assumptions.
- Propose a repeatable calibrated VNA verification experiment with independent standards.
Worked solutions
1. A calibration plane is where the VNA's error model defines the corrected incident/reflected waves, typically at a characterized connector or probe tip. A DUT component farther inside a fixture is not necessarily at that plane. The intervening connector, launch and line remain inside the corrected S response until separately characterized and removed.
2. Starting from , define . Then , so . The model and its coefficients are complex and frequency dependent; poor denominator conditioning magnifies noise and standard-model error.
3. Multiply by its denominator and collect terms: . Let . The row for each standard is multiplying ; solve three distinct rows and finally .
4. For the ideal reference, an open gives , a short , and a real matched load . A physical open has parasitic capacitance and offset delay, a short can have inductance and finite resistance, and a load has residual mismatch. Using incorrect ideal values changes the fitted error coefficients, so calibrated kit data and a separate verification standard are required.
5. For a lossless uniform section, . With , . A load therefore appears at the outer reference plane as . Magnitude 0.3 is preserved only in the lossless assumption.
6. With propagation constant , the outer-plane reflection is . Therefore . Its magnitude is multiplied by and its phase corrected by +2βd, assuming the uniform line section is accurately known and no extra discontinuity exists.
7. SOLT uses characterized short, open and matched-load reflections, plus a through connection that defines transmission coupling between the two calibrated ports. Both forward and reverse measurements are important for tracking and source/load-match terms. Exact numbers of coefficients and switch terms depend on the instrument's implementation; the physical standard models are not universally ideal.
8. TRL compares a thru and a line with guided phase difference , and uses a reflect standard. When approaches , a common TRL solution becomes poorly conditioned or ambiguous. A given line length therefore supports a limited frequency span; multiline TRL introduces several lengths and requires consistent modal geometry.
9. If the measured chain matrix factors as , multiply on the left by T_L^−1 and on the right by T_R^−1 to obtain . Both fixture boxes must be independently known and invertible, referenced to compatible modes and current/voltage signs; arbitrary scalar attenuation subtraction is not equivalent.
10. Document VNA model/firmware, calibrated port planes, standards models, frequency points, source power, IF bandwidth, averaging, cable state and DUT bias. Calibrate with characterized standards, test a verification device not used for fitting, then measure complex S. Reconnect and repeat to estimate variability; archive raw and corrected Touchstone traces and fixture assumptions.
Next: a dedicated comparison of SOLT, TRL and multiline TRL, with conditioning examples and calibration-standard design.