L-section impedance matching: topology, exact derivation and VNA check
Choose the physically realizable shunt/series order, derive both sign branches, build 50-to-200 Ω and 200-to-50 Ω circuits at 1 GHz, and audit loss and bandwidth.
- Define input matching for a real-positive reference resistance and distinguish source conjugate matching.
- Deduce the correct topology when the load resistance exceeds the source resistance.
- Deduce the reversed topology when the source resistance exceeds the load resistance.
- Derive B and X from nodal admittance and complex impedance, without memorizing recipes.
- Translate the two signed solutions into physically positive L and C values.
- Compute an ideal 50-to-200 Ω transformation at 1 GHz and check its input impedance.
- Compute the reversed 200-to-50 Ω case from its own admittance equation.
- Distinguish the ideal center-frequency match from bandwidth and dissipation.
- Explain VNA S11 calibration and why measuring insertion loss also requires a two-port fixture.
- Document component tolerances, substrate/fixture parasitics and experimental uncertainty.
01Matching is a boundary condition
A network is matched at its defined input plane when its impedance equals the real reference resistance. This is a single-frequency condition; source conjugate matching and transducer gain require their own source assumptions. For the present ideal lossless network, zero input reflection implies accepted power flows into the resistive load.
The specification concerns the impedance actually seen looking into the matching network, not the bare load. An ideal reactance does not dissipate average power, so its role is to redistribute voltage and current while meeting a real input constraint. A physically complex source impedance would require a conjugate-target derivation instead of blindly using a real resistor.
02Series and shunt elements
At the operating frequency a series inductor contributes positive reactance and a capacitor negative reactance. A shunt capacitor contributes positive susceptance, whereas an inductor has negative susceptance. Writing Kirchhoff equations at the physical node decides topology feasibility before components are selected.
Work at one angular frequency with phasor convention exp(+jωt). The capacitor current leads its voltage and its shunt admittance has positive imaginary part; an inductor has negative shunt susceptance. This sign convention must remain consistent when converting the algebraic solution into discrete components.
03Load resistance larger than source resistance
Place shunt susceptance across the load and then series reactance towards the source. Invert the parallel admittance, set its real part equal to the source resistance, and cancel the negative or positive residual reactance. There are two sign branches, but both share one node arrangement.
The shunt branch sees precisely the same node voltage as the load resistor. The admittance is therefore a sum, while its inverse develops a negative imaginary impedance for the capacitive branch. Only after imposing the correct real part can the sourceward series inductance cancel that imaginary part; interchanging the node order changes the circuit.
04Load resistance smaller than source resistance
Place a series reactance directly at the load and shunt susceptance at the input. Equating the real part of total input admittance to the inverse source resistance yields a real reactance only in the low-load-resistance case. Shunt susceptance cancels the imaginary admittance.
For the reverse ratio the load-side series element changes the impedance before taking its reciprocal. The source-side shunt element then changes admittance but cannot affect its real part. This separation gives the feasibility condition without guessing values or transposing an unsuitable circuit drawing.
05The two physical sign branches
Positive series reactance means inductance, while positive shunt susceptance means capacitance: an ideal low-pass L network. Reversing both signs swaps the components into a high-pass response. Neither realization is automatically better: compare DC bias feed, harmonics, package parasitics and available component values.
The two sign branches are algebraically valid under the ideal assumptions, but one must map each signed reactance or susceptance to the correct positive physical L or C. The matching transformation ratio fixes a network quality-factor parameter, which must not be confused with a measured resonator loaded quality factor.
06A complete 1 GHz example
For a 50-ohm source and 200-ohm load, compute the load-side shunt susceptance and source-side series reactance directly from the derived formulas. Convert susceptance to capacitance and reactance to inductance at 1 GHz, then reconstruct the exact parallel impedance before asserting input matching.
To audit units, remember that B is measured in siemens and X in ohms. Their products with angular frequency determine actual capacitance and inductance, respectively. Reverse-engineering the complex input impedance using the calculated part values is a more reliable final check than trusting the component formulas alone.
07Bandwidth and component loss
The reactances change with frequency even when physical L and C are held fixed. Compute input impedance and complex reflection at each frequency; a zero at the design frequency does not imply a wide return-loss bandwidth. Model finite inductor Q as an explicit series resistance before claiming insertion-loss performance.
The ideal zero of reflection is narrow in the sense that changing frequency generally changes the complex cancellation. The series loss of a real inductor moves the input resistance and also reduces delivered load power. Reflection loss, dissipation and power-transfer bandwidth therefore require separate computations using realistic component models.
08Measured verification with a VNA
Calibrate at the fixture reference planes, distinguish a one-port S11 check from a two-port insertion-loss measurement, and record cable/fixture de-embedding. Compare measured complex S parameters against a loss-aware circuit model; report the calibration method, component tolerance and uncertainty rather than claiming a perfect real match.
A one-port S11 trace can identify an input reflection minimum but cannot independently measure dissipated power. A two-port fixture with known terminations is necessary to interpret S21; the calibration reference planes must be specified before comparing measurements to a simulation or to the synthesized ideal network.
Problems and worked solutions
- What is the physical meaning of a match?
- Can the shunt-at-input topology match 200 Ω to 50 Ω?
- Derive the 200-to-50 Ω formula from a nodal equation.
- Reverse the source and load: how should components move?
- Calculate low-pass parts for a 50 Ω to 200 Ω match at 1 GHz.
- What is the high-pass alternative at 1 GHz?
- Verify the low-pass input impedance independently.
- What changes when the frequency rises by 20 percent?
- How does series inductor resistance affect matching?
- Design a reproducible VNA validation.
Show solutions
1. At a real reference resistance R_S, define . Setting Gamma to zero gives because the denominator is nonzero for this positive resistance. Only then is the reflected incident power zero at that plane; this does not by itself specify the network loss or wideband behavior.
2. No. If a series X is next to the 200 Ω load, the input admittance real part is , which cannot exceed . A 50 Ω match requires , so the topology is impossible with purely reactive elements. Relocate the shunt branch to the load.
3. With admittance at the 200 Ω load and a sourceward series , the parallel impedance is . Its real part must equal 50 Ω: . Hence , and cancelling imaginary impedance requires .
4. For and , put the series reactance directly by the load and place shunt susceptance at the source-side plane. Setting gives . Set so that the input admittance is purely .
5. Use the shunt-at-load arrangement: and . Thus and . The ideal component values are frequency-specific, not interchangeable with an arbitrary π network.
6. Take negative B and X in the same load-side-shunt topology. Its shunt inductor has , while its source-side series capacitor has . The sign reversal preserves the real input match only at the chosen frequency and swaps the frequency response.
7. The shunt input admittance across 200 Ω is . Inverting gives the load-side equivalent . Adding the sourceward series inductor gives exactly . The reflection coefficient with a 50 Ω real reference is therefore zero.
8. Hold the physical inductance and capacitance constant and set . Then , while . Compute the new complex shunt impedance from , add , and substitute into . The imaginary part no longer cancels and reflection is nonzero.
9. Write . At the original design frequency the reactive terms still cancel, but . Hence , real and positive, while some accepted power now heats the inductor. Return loss is not equal to insertion loss.
10. Calibrate the VNA at the connector planes with a documented method. First measure over a band containing 1 GHz and compare its minimum with the ideal model; for losses measure a true two-port fixture and , correcting reference planes before interpreting the insertion loss. Preserve Touchstone data, physical component tolerances, repeat measurements, and report uncertainty.