Differential pair
Build BJT and MOS differential pairs from matched-device laws, a shared tail current and explicit differential/common-mode variables. Derive current steering, the symmetric operating point, differential small-signal gain, common-mode response with finite tail resistance, CMRR and the role of active loads. Keep single-ended and differential outputs distinct and connect every gain formula to the actual circuit and bias point.
- Define vid=v1−v2 and vcm=(v1+v2)/2 and recover v1,v2 from those variables.
- Draw canonical BJT and MOS differential pairs with explicit tail current, loads, input terminals and both output nodes.
- Derive the matched BJT large-signal current-steering law and IC1−IC2=Itail tanh(vid/(2VT)).
- Show that at vid=0 a symmetric matched pair carries Itail/2 in each branch.
- Derive the pure differential small-signal half-circuit and show that each device sees ±vid/2 when the ideal tail node is an AC virtual ground.
- Derive single-ended and differential gains and keep their factor-of-two difference explicit.
- Derive the first-order single-ended common-mode gain with finite tail resistance and explain why an ideal tail current source suppresses common-mode conversion.
- Define CMRR from differential and common-mode gains under a stated output convention.
- Explain how device/load mismatch converts common-mode input into differential output and creates input-referred offset.
- Explain how a current-mirror/active load can convert differential currents into a single-ended voltage while changing output resistance and headroom.
A differential pair does not primarily amplify either input with respect to ground. It compares two inputs and steers a shared bias current according to their difference. Common-mode level still matters because every transistor and the tail source must remain inside a valid voltage range.
01.1Separate differential and common-mode coordinates
These are a change of coordinates, not an approximation. Differential excitation varies the two inputs oppositely; common-mode excitation moves them together.
01.2MOS pair: one tail current, two branch currents
Figure 1.1 — nMOS differential pair with resistive loads
The one question is: how does an almost-constant tail current divide between the two branches when v1−v2 changes?
Q1 and Q2 are matched. Their sources join at one tail node while the drains form two distinct outputs. The tail source fixes the current sum while it and both MOSFETs remain in their assumed operating regions.
For a matched long-channel nMOS pair with both devices in saturation and channel-length modulation neglected,
As long as both transistors conduct in this square-law model, subtracting the square roots gives
At vid=0 symmetry requires ID1=ID2=Itail/2. Increasing vid transfers current toward Q1 until one branch approaches the edge of conduction. The exact large-signal law is model-dependent; the small-signal slope at the symmetric Q-point is the quantity needed for linear amplification.
01.3BJT pair: the exponential law gives an exact first steering law
Figure 1.2 — NPN differential pair
The one question is: why does the exponential law turn v1−v2 into current steering bounded by Itail?
The emitters share one tail node. For matched BJTs and sufficiently large β in the first model, the collector-current ratio depends exponentially on the base-voltage difference.
Ignoring base currents and Early effect for the first large-signal model, matched forward-active BJTs share the same emitter voltage, so
Solving the two equations gives
The difference current is bounded by ±Itail. Near zero, tanh(x)≈x; because each transistor carries Itail/2, its gm=(Itail/2)/VT and the differential current slope becomes gm.
01.4Pure differential excitation creates a symmetry plane
At the symmetric Q-point apply +vid/2 to Q1 and −vid/2 to Q2. With an ideal tail current source, the incremental branch currents sum to zero, so the shared source/emitter node does not move to first order: it is an AC virtual ground for this differential mode.
For the BJT replace drain by collector; the first-order result has the same circuit form once gm is evaluated at each branch Q-point.
01.5Single-ended and differential voltage gains differ by two
With equal resistive loads R to AC ground and output convention vod=vo1−vo2,
A factor-of-two disagreement is often only an output-definition disagreement. Always state whether the measured output is one side or the difference of both sides.
01.6Common-mode excitation tests the tail source
Now set v1=v2=vcm. For matched branches the two current increments are equal. If the tail source has finite small-signal resistance rtail and base/gate input-current effects are neglected in the first model, each branch approximately satisfies
As rtail→∞, single-ended common-mode gain tends toward zero. In a perfectly matched differential-output measurement, equal common-mode output components cancel even more strongly; real mismatch prevents perfect cancellation.
01.7CMRR requires an output convention
For the single-ended definitions above,
The dB form is 20log10(CMRR). A differential-output CMRR additionally depends on mismatch because ideal common-mode terms cancel at subtraction. Therefore a quoted CMRR is incomplete without the input/output convention and frequency.
01.8Mismatch turns common mode into differential error
If gm1≠gm2, load resistances differ, threshold/VBE offsets exist, or output resistances differ, equal input changes no longer create equal branch responses. That imbalance appears as differential output and can be referred back to an equivalent input offset.
Matched geometry and shared temperature improve integrated differential pairs, but mismatch never vanishes. A useful model separates systematic imbalance caused by the circuit from random device mismatch.
01.9Active loads convert current difference into one output
A current-mirror load can subtract/reflect one branch current into the other output node, producing a single-ended signal proportional to the differential branch-current change. The gain can approach gm times the loaded output resistance rather than gmR/2, but finite ro, mirror error, mismatch and headroom all enter.
The active-load chapter of AE-02 therefore becomes a building block here rather than a separate trick. MIT 6.012 Lecture 20 explicitly treats active loads in differential-amplifier analysis.
01.10Mastery exercises
- Given v1=1.02 V and v2=0.98 V, compute vid and vcm.
- A symmetric BJT pair has Itail=1 mA at 300 K. Estimate each IC and gm at vid=0 using VT=25.85 mV.
- For the pair in problem 2 with RC=4 kΩ, compute Ad,se and Ad,diff, neglecting ro.
- Use the exact BJT steering law to find IC1−IC2 for vid=25.85 mV and Itail=1 mA.
- For gm=20 mS, R=5 kΩ and rtail=100 kΩ, estimate Acm,se and the single-ended CMRR.
- Why does a perfectly symmetric differential output reject an equal common-mode voltage more strongly than one single-ended output?
Solutions
1. vid=40 mV; vcm=1.00 V.
2. IC≈0.5 mA each; gm≈0.5 mA/25.85 mV≈19.34 mS.
3. Ad,se≈−38.7 V/V and Ad,diff≈−77.4 V/V.
4. tanh(0.5)≈0.4621, so the difference current is ≈0.462 mA.
5. Acm,se≈−100/(1+4000)≈−0.0250 V/V; |Ad,se|=50, so CMRR≈2000.5, about 66 dB.
6. Matched common-mode output increments are equal on both sides, so subtraction ideally cancels them; mismatch leaves a residual.
Chapter 02 will turn the differential-input/single-ended-output idea into the operational-amplifier abstraction and then quantify the parameters hidden by the ideal op-amp symbol.