04 · Foundational

Source transformations & terminal equivalence

A voltage source in series with R and a current source in parallel with the same R can be exactly equivalent at a two-terminal port. Derive the shared port law, match open/short behavior, test a loaded example, and understand what terminal equivalence deliberately hides.

130–165 minFoundational
In this lesson
  • Define source transformation through equality of the complete terminal voltage-current relation, not by visual resemblance.
  • Derive V=VS−IR for a voltage-source-plus-series-resistance model using a fixed port current convention.
  • Derive V=ISR−IR for a current-source-plus-parallel-resistance model and obtain IS=VS/R.
  • Verify the transformation using open-circuit voltage, short-circuit current and an arbitrary finite load.
  • Explain why terminal-equivalent networks may have different internal currents, element powers and source powers.
  • Apply source transformations with correct polarity/arrow signs and state the limiting cases where finite transformations cease to exist.
  • Extend the reasoning cautiously to controlled sources while preserving the control-variable definition.
Starting question

When can two circuits that look very different be guaranteed to behave identically for every load connected to the same two terminals?

The decisive object is the terminal voltage–current relation. If two one-ports impose exactly the same relation between port voltage V and port current I, then an external circuit connected only through that port cannot distinguish them by terminal behavior. Source transformation is one particularly important example of this principle.

04.1Fix the port convention before deriving anything

Use the lower terminal as the voltage reference and let V be the upper-port voltage. Define I as positive when the source network delivers current out of its upper terminal into the external load.

This convention matters because the sign in the terminal equation follows it. We will use the same V and I references for both source representations.

04.2Voltage-source form: derive the complete port law

Figure 4.1 — Voltage-source form with series resistance

The ideal source fixes 12 V before a 3 kΩ series resistance. The output port drives a 6 kΩ load here. Source transformation concerns the behavior seen from VOUT and ground.

verified topology
Voltage source with series resistance feeding a load+−VS12 VRS3 kΩRL6 kΩVOUTGND
The one question is: what relation between port voltage and delivered load current does this network impose?

For an ideal source VS followed by series resistance R, the same delivered port current I flows through R. Kirchhoff's voltage law gives

VS = IR + V

Therefore

V = VS − IR

This straight-line relation contains the entire two-terminal behavior of the source network. It is more informative than any single loaded operating point.

At I=0, the port is open and V=VS. As I increases in the delivery direction, the series-resistance drop IR reduces the terminal voltage.

04.3Current-source form: derive its port law

Figure 4.2 — Current-source form with parallel resistance

The ideal source injects 4 mA toward VOUT. The 3 kΩ source resistance and 6 kΩ load both connect from VOUT to ground. The current arrow inside the source is intrinsic to the component.

verified topology
Current source with parallel resistance feeding a loadIS4 mARS3 kΩRL6 kΩVOUTGND
The one question is: can this form impose exactly the same terminal V–I relation as Figure 4.1?

Let the ideal current source inject IS upward into the positive output node. At that node, source current divides between the external port current I and the parallel resistor current V/R:

IS = I + V/R

Rearrange:

V = R(IS−I)
V = ISR − IR

The current-source form will therefore have the same terminal law as the voltage-source form for every possible I if

VS = ISR
IS = VS/R

The resistance value is unchanged by the transformation; only its connection changes from series to parallel while source type and magnitude change.

04.4Open circuit and short circuit expose the same conversion immediately

Open circuit: I=0. Both forms must give the same open-circuit voltage:

VOC = VS = ISR

Short circuit: V=0. Both forms must give the same current delivered into the short:

ISC = VS/R = IS

Therefore the matched finite-resistance pair can also be described by

VS=VOC
IS=ISC
R=VOC/ISC

These endpoint checks are useful, but the stronger proof is the identical full V–I line derived above. Matching only one operating point would not be enough.

04.5Complete loaded example: 12 V + 3 kΩ ↔ 4 mA ∥ 3 kΩ

Transform the 12 V source with R=3 kΩ:

IS=12 V/(3 kΩ)=4 mA

Connect RL=6 kΩ to both forms.

Voltage-source form:

IL=12 V/(3 kΩ+6 kΩ)=4/3 mA≈1.333 mA
VL=IL(6 kΩ)=8 V

Current-source form: the two parallel resistances give

Req=3 kΩ∥6 kΩ=2 kΩ
VL=(4 mA)(2 kΩ)=8 V
IL=8 V/(6 kΩ)=4/3 mA

The load sees exactly the same 8 V and 1.333 mA. Consequently its absorbed power is the same:

PL=VLIL=32/3 mW≈10.667 mW

04.6Equivalent at the port does not mean identical inside

In the voltage-source form, the series resistance carries only the load current 4/3 mA:

PR,series=(4/3 mA)²(3 kΩ)=16/3 mW≈5.333 mW

The ideal 12 V source delivers

PVS=−(12 V)(4/3 mA)=−16 mW

In the current-source form, the 3 kΩ shunt resistor has the full 8 V across it:

PR,parallel=(8 V)²/(3 kΩ)=64/3 mW≈21.333 mW

The 4 mA current source delivers

PIS=−(8 V)(4 mA)=−32 mW

Both internal power balances close, and both deliver the same 10.667 mW to the load, yet their internal source powers and resistor dissipations differ greatly.

04.7Open and short cases make the internal difference even more obvious

Open port. The voltage-source form carries no current: its series resistor dissipates 0 and the ideal voltage source exchanges 0 power. The current-source form still circulates 4 mA through its own 3 kΩ parallel resistor, producing 12 V and 48 mW of internal resistor dissipation supplied by the ideal current source.

Shorted port. The voltage-source form drives 4 mA through its 3 kΩ series resistor; the source delivers 48 mW and the resistor absorbs 48 mW. In the current-source form, the port voltage is 0, the parallel resistor carries 0, and the ideal current source drives 4 mA through the external short while exchanging zero power because its voltage is zero.

The open-circuit voltage and short-circuit current remain identical at the port. Internal energy circulation need not be.

04.8Polarity and arrow direction determine the sign of the transformed source

Our positive voltage source makes the upper port positive, and the equivalent current source arrow injects upward into that positive port. Under those references

IS=+VS/R

If the current-source arrow is drawn in the opposite direction while all other references stay fixed, its signed value must be

IS,opposite arrow=−VS/R

Likewise reversing the voltage-source polarity changes the sign of VS. Source transformation does not replace sign discipline; it depends on it.

For finite nonzero R the algebraic transformation is well defined. A nonzero ideal voltage source with R=0 would require |IS|→∞, so it has no finite current-source transformation. Conversely an ideal current source with R→∞ would require an unbounded voltage-source value.

04.9Controlled-source transformations require preserving the control definition

The terminal-law derivation does not depend on the source being independent. Suppose a voltage-controlled voltage source imposes

vs=μvx

in series with R. Its equivalent current-source value is

is=vs/R=(μ/R)vx

which is a voltage-controlled current source with transconductance μ/R in parallel with the same R.

But the transformation is valid only if vx remains the same defined control variable after the replacement. If the control variable was an internal current or voltage of the subnetwork being removed, blindly transforming the source can destroy the very quantity that defines the dependent source. In that case rewrite the full equations and verify the resulting terminal/control relations explicitly.

04.10What source transformation is—and is not

ClaimCorrect statement
“The two circuits are identical.”They are equivalent only with respect to the specified external port behavior.
“Matching open-circuit voltage is enough.”No. The full terminal V–I relation must match; open and short endpoints are useful checks for this linear form.
“The resistance value changes in the transformation.”No. The same R moves from series to parallel or vice versa.
“Internal power must be the same.”No. Only terminal voltage/current behavior—and therefore power delivered to the same external load—is preserved.
“Source transformation is superposition.”No. Superposition decomposes excitations in a linear circuit; transformation replaces a one-port by another with the same terminal law.
  1. Transform a 9 V source in series with 3 kΩ into current-source form.
  2. Transform a 2 mA source in parallel with 4 kΩ into voltage-source form.
  3. A 15 V source with 5 kΩ drives a 10 kΩ load. Solve in voltage-source form and transformed current-source form.
  4. With VS=−6 V and R=2 kΩ under the chapter's fixed references, find the equivalent signed current source.
  5. For the 12 V / 3 kΩ example, compare internal resistor power in the two forms when RL=6 kΩ.
  6. Why does attaching a probe to the internal node between VS and R destroy the guarantee that the current-source form reproduces that new measurement?
  7. A controlled source has vs=3vx in series with 6 kΩ. Write the transformed source relation and identify its coefficient unit.
  8. Can a 5 V ideal voltage source with zero series resistance be represented by a finite ideal current source in parallel with zero resistance? Explain from IS=VS/R.
Solutions

1. IS=9 V/3 kΩ=3 mA, in parallel with the same 3 kΩ; the arrow injects toward the positive port.

2. VS=(2 mA)(4 kΩ)=8 V, in series with the same 4 kΩ.

3. Voltage form: I=15/(5k+10k)=1 mA and VL=10 V. Current form: IS=3 mA, 5 kΩ∥10 kΩ=10/3 kΩ, so VL=10 V and IL=1 mA.

4. IS=−6 V/2 kΩ=−3 mA relative to the upward reference; equivalently use a +3 mA source with the arrow reversed.

5. Series form internal resistor power is 16/3 mW≈5.333 mW. Parallel form internal resistor power is 64/3 mW≈21.333 mW. Load behavior is still identical.

6. Terminal equivalence was specified only for the original two external terminals. Exposing an internal node creates an additional port/observable that was not constrained to match.

7. is=(3/6 kΩ)vx=(0.5 mS)vx. The coefficient is a transconductance with units siemens.

8. No finite transformation exists: IS=5 V/0 tends to unbounded current. The limiting ideal voltage source cannot be represented by a finite current-source pair.

Chapter 05 will combine superposition, source transformation and port reasoning into a multi-source synthesis workflow, then connect that workflow explicitly to the broader Thévenin/Norton theorem developed in CT-01.