05 · Introductory → foundational

Loading & equivalent resistance

Connecting a load changes the network. This chapter quantifies that change, defines resistance seen from a port, derives loading error, and prepares the transition to Thévenin/Norton reasoning.

115–145 minIntroductory → foundational
In this lesson
  • Recognize loading as a topology change rather than a correction factor.
  • Derive the loaded voltage-divider relation using a parallel lower branch.
  • Define a two-terminal equivalent resistance by external terminal behaviour.
  • Find the output resistance of a linear resistive divider after deactivating its independent ideal voltage source.
  • Derive a quantitative load-resistance criterion for a specified maximum voltage error.
  • Diagnose measurement loading and state what an equivalent circuit preserves and hides.
Starting question

Why can a voltage be correct before you connect an instrument or another circuit block, then become wrong the moment you connect it?

Because the instrument or block is part of the circuit. A load is not a passive observer: it adds electrical paths, changes equivalent resistance, changes currents, and therefore changes voltages. This chapter turns “loading” from a warning word into a quantitative design tool.

05.1Loading is a topology change

Figure 5.1 — A load adds a branch at the output node

Without a load, R1 and R2 form one series string. With RL connected from VOUT to ground, the output node has a third branch and current through R1 can split.

verified topology
Loaded voltage divider+−VS10 VR110 kΩR210 kΩRL10 kΩVINVOUTGND
This figure answers one topological question only: what changed when the load was connected?

Before RL is connected, the output node joins only R1 and R2, so one current flows through the series string. After RL is connected from VOUT to ground, the output node acquires a third branch. Current arriving through R1 can split between R2 and RL.

That means the original unloaded voltage-divider derivation no longer matches the new topology. The correct first step is to redraw or mentally reduce the actual network.

05.2Derive the loaded voltage divider from the changed network

Figure 5.2 — Loaded output-voltage reference

The output voltage is still defined from ground, the negative reference, toward positive VOUT. The arrow is placed to the left of R2 so it remains distinct from RL.

verified topology
Loaded voltage divider+−VS10 VR110 kΩR210 kΩRL10 kΩVINVOUTGND
No current arrows are added: this figure only fixes the voltage reference used in the derivation.

R2 and the load RL connect between the same two nodes, so they are parallel. Replace them by the lower equivalent resistance

Rlower = R2 ∥ RL = R2RL/(R2+RL)

The network is now R1 in series with Rlower. Therefore

VL = VIN · Rlower/(R1+Rlower)

This is not a new divider law. It is the ordinary voltage-divider result applied to the actual lower resistance after the load has been included.

Because R2∥RL is always smaller than R2 for finite positive RL, a passive resistive load connected to ground pulls this divider output below its unloaded value.

05.3Complete example: a “5 V” divider collapses to 3.33 V

Take VIN=10 V and R1=R2=10 kΩ. Unloaded,

V0 = 10 V · 10/(10+10) = 5 V

Now connect RL=10 kΩ. The lower resistance becomes

Rlower = 10 kΩ ∥ 10 kΩ = 5 kΩ

and the actual loaded output is

VL = 10 V · 5/(10+5) = 3.33 V

The relative drop from the unloaded value is

(V0−VL)/V0 = (5−3.33)/5 ≈ 33.3%

The failure is large because the load resistance is comparable with the divider resistances. The “5 V node” was never an ideal 5 V source.

05.4Equivalent resistance means equivalent terminal behaviour

A two-terminal equivalent resistance is a single resistance that reproduces the same voltage–current relation seen from a specified pair of terminals, within the model being used.

V = ReqI

For a resistor-only linear network, series and parallel reductions are simply convenient ways of finding that terminal relation. The external circuit cannot distinguish the original passive network from Req if it interacts only through those two terminals.

But the replacement hides internal node voltages, individual branch currents, local power dissipation and component stress. If an internal node is used elsewhere, collapsing the network may destroy information that matters.

05.5Resistance seen from the divider output

Figure 5.3 — Resistive network seen from the output after source deactivation

Setting the independent ideal voltage source to 0 V replaces it, for this resistance calculation, by a short circuit. R1 and R2 then both connect the output port to ground and are in parallel.

verified topology
Source-deactivated resistance seen from the portR110 kΩR210 kΩVOUTGND
This is an analysis operation on a linear model, not a physical claim about what a real powered-off source becomes.

To ask how strongly the divider output reacts to a load, we need the resistance seen looking back into the output port. For a linear resistive circuit, independent ideal sources are first set to zero for this resistance calculation.

  • An independent ideal voltage source set to 0 V becomes a short circuit.
  • An independent ideal current source set to 0 A becomes an open circuit.
  • Dependent sources are not simply turned off; the test-source definition must be used.

For the simple divider, setting VIN to 0 V shorts the input node to ground. R1 and R2 are then both connected from VOUT to ground:

Rout = R1 ∥ R2

For the 10 kΩ / 10 kΩ divider, Rout=5 kΩ.

05.6The test-source definition is the safer general idea

Figure 5.4 — Test source defining resistance seen at a port

A test voltage is applied between the port and ground. The resistance seen at the port is the ratio of that test voltage to the total current drawn by the network.

verified topology
Test-source method for driving-point resistance+−Vt1 VR110 kΩR210 kΩPORTGND
This definition remains useful when series/parallel reduction is not obvious. Dependent sources, if present, remain active.

After independent sources have been deactivated where appropriate, apply a test voltage Vt at the port and calculate the current It drawn into the network. Define

Rseen = Vt/It

For two 10 kΩ resistors in parallel, a 1 V test source draws

It = 1 V/10 kΩ + 1 V/10 kΩ = 0.2 mA

so

Rseen = 1 V/0.2 mA = 5 kΩ

This reproduces the parallel reduction but gives a definition that still works when visual series/parallel simplification is unavailable. In linear circuits containing dependent sources, the test source is especially important because those dependent sources remain active.

05.7Turn loading into an error budget

Let V0 be the unloaded output voltage and Rout the resistance seen from that output. For the linear resistive divider, direct algebra gives the loaded output

VL = V0 · RL/(Rout+RL)

Define the fractional loading error as the relative drop from the unloaded output:

ε = (V0−VL)/V0

Substitution gives

ε = Rout/(Rout+RL)

If the design requires ε≤εmax, solve for the minimum load resistance:

RL ≥ [(1−εmax)/εmax]Rout

For a 1% maximum loading error, the exact condition is

RL ≥ 99Rout

This is the quantitative origin of the common engineering preference for a load resistance roughly two orders of magnitude larger than the source/output resistance when very small DC loading error is desired.

05.8Measurement loading: the voltmeter becomes a resistor in the circuit

A real voltmeter or digital multimeter (DMM) has finite input resistance. At DC, a simple first model is a resistor connected from the measured node to the instrument reference.

Case A — low-output-resistance divider. For the 10 kΩ / 10 kΩ divider, Rout=5 kΩ. With an illustrative 10 MΩ meter input,

ε = 5 kΩ/(5 kΩ+10 MΩ) ≈ 0.050%

The measurement loading is negligible for many purposes.

Case B — high-output-resistance source. If Rout=1 MΩ and the same 10 MΩ meter is used,

ε = 1 MΩ/(1 MΩ+10 MΩ) ≈ 9.09%

The meter now materially changes the quantity being measured.

05.9What this chapter does—and does not—let you replace

SituationCorrect interpretation
Passive resistor network viewed through two terminalsReplace by Req if only terminal V–I behaviour matters.
Divider output driving a finite resistanceInclude the load; do not use the unloaded formula unchanged.
Linear network containing independent sourcesUse port resistance with source deactivation or a test source; do not simply “add the resistors you see.”
Dependent-source networkKeep dependent sources active and use a test source.
Frequency-dependent or reactive networkReplace resistance by impedance/admittance; the simple DC formulas are no longer sufficient.
Nonlinear device networkA single constant resistance may not reproduce terminal behaviour over a wide operating range.

The next conceptual step is powerful: a whole linear two-terminal source network can be represented by an ideal source plus one resistance as seen by a load. That is the Thévenin/Norton framework developed later in CT-01; DC-03 has now built every prerequisite needed to understand why it works.

05.10Practice for mastery

  1. A 12 V divider uses R1=20 kΩ and R2=10 kΩ. Find the unloaded output, then the loaded output with RL=10 kΩ.
  2. For a 15 kΩ / 5 kΩ divider, find the resistance seen from the output after the ideal voltage source is set to zero.
  3. A source has V0=2.5 V and Rout=2 kΩ. Find the loaded voltage for RL=18 kΩ and the relative loading error.
  4. What minimum RL guarantees no more than 0.5% loading error if Rout=1 kΩ?
  5. A 10 MΩ voltmeter measures a node whose output resistance is 500 kΩ. Estimate the loading error.
  6. A network contains a dependent source. A student sets every source to zero before finding output resistance. What is wrong with the procedure?
Solutions

1. Unloaded: V0=12·10/(20+10)=4 V. Loaded: Rlower=10 kΩ∥10 kΩ=5 kΩ, so VL=12·5/(20+5)=2.4 V.

2. Rout=15 kΩ∥5 kΩ=3.75 kΩ.

3. VL=2.5·18/(2+18)=2.25 V. The relative drop is 0.25/2.5=10%.

4. RL≥[(1−0.005)/0.005](1 kΩ)=199 kΩ.

5. ε=0.5 MΩ/(0.5 MΩ+10 MΩ)=4.76%.

6. Only independent sources are deactivated. Dependent sources must remain active; apply a test source at the port and compute the resulting terminal ratio.

DC-03 is now conceptually closed: topology determines which quantities are shared, Kirchhoff's laws constrain them, Ohm's law turns those constraints into series/parallel reductions and divider relations, and loading tells us when the simplified network must be rebuilt.