Understand
Treat everything to the left of the load terminals as a one-port. Ask what voltage/current law the load sees.
Replace a loaded resistor network by two different source models and prove that the load cannot tell the difference.
A 12 V source feeds R1 = 3 kΩ in series with a node where R2 = 6 kΩ goes to ground. A load RL = 4.7 kΩ will later be connected from VOUT to ground. Before connecting the load, determine the Thévenin and Norton equivalents seen at VOUT. Then use each equivalent to predict the loaded voltage and current.
The load is connected here only for the final equivalence check. Remove RL conceptually when extracting VTH and RTH.
Interpret Thévenin/Norton as equivalent terminal behavior rather than algebraic tricks.
Find VTH from the open-circuit voltage.
Find RTH by deactivating the independent voltage source.
Convert exactly between Thévenin and Norton forms.
Verify that the original, Thévenin and Norton circuits predict the same loaded operating point.
Same port behavior represented by an ideal voltage source in series with RTH.
Same port behavior represented by an ideal current source in parallel with RN = RTH.
Treat everything to the left of the load terminals as a one-port. Ask what voltage/current law the load sees.
Remove RL, compute VOC = VTH, then zero the 12 V source and look back into the port to find RTH.
Compute IN = VTH/RTH and draw the Norton source in parallel with RN = RTH.
Reconnect RL and compute VL and IL from both equivalents. The results must match.
Explain why internal circuits with different drawings can still be indistinguishable from the load.
With RL removed, R1 and R2 form an ordinary divider.
When an ideal voltage source is set to 0 V, replace it by a short circuit.
After that short, R1 and R2 are both connected from VOUT to ground.
Use IN = VTH/RTH for the Norton form.
The detailed course derives the terminal law, covers dependent sources and test-source methods, solves multi-node resistor networks, then applies Thévenin to real source–load design and measurement loading.
Leaving RL connected while calculating VTH.
Opening the ideal voltage source instead of shorting it when deactivating it.
Using R1 + R2 for RTH even though the zeroed source makes them parallel.
Treating Norton as an approximation instead of an exactly equivalent terminal model.
Comparing internal branch currents between equivalent models; only terminal behavior is guaranteed to match.
Reveal only after completing your own derivation.
The useful evidence is not that you saw the theorem; it is that you can derive, transform and verify the port model.
Correct VTH, RTH and IN with stated source-deactivation reasoning.
Same VL and IL obtained from the original, Thévenin and Norton forms.
Clear statement of what terminal equivalence does and does not imply.
Optional MAJAL DC verification of all three circuits.